The present invention relates to a semiconductor memory device, a memory system including the same, and a method of manufacturing the same; and more particularly, relates to a semiconductor memory device including a conductive line, a memory system including the same, and a method of manufacturing the same.
A semiconductor memory device includes conductive lines for applying a voltage to memory cells. A NAND flash memory device, which is a kind of the semiconductor memory device, includes a bit line formed of a conductive material. The bit line is connected to a memory string. The memory string includes memory cells connected in series. The bit line is located on a dielectric layer which is formed on the memory string to cover the memory string. The bit line is connected to the memory string via a contact plug connected directly to a drain area of the memory string by penetrating through the dielectric layer. Accordingly, it is important to secure overlay margin between the bit line and the contact plug.
A technique using an etching stop layer may be provided to secure the overlay margin. However, since the etching stop layer is generally made up of material having high dielectric constant, the technique may increase parasitic capacitance between the bit lines, thereby causing resistance-capacitance (RC) delay.